• B2.5.2.3 PCI Local Bus Specification, Revision 2.2 (PCI 2.2) or later
  • B2.5.2.6 Mini PCI Specification, Revision 1.0
  • B2.5.2 PCI Controllers/Devices - Industry Standards




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    B2.5.2 PCI Controllers/Devices - Industry Standards

    B2.5.2.1 PCI Bus Power Management Interface Specification, Revision 1.1 or later

    [PCI-0130; SDG3:37; see also FAQ B2.5.5.5]
    B2.5.2.2 PCI Bus Power Management Interface Specification for PCI-to-CardBus Bridges

    [PCCard-19; SYS-0024]

    Note: Support of the CSTSCHG interrupt line is required only for devices that support wakeup events as defined in the PC Card standard.

    Provided in Volume 11, PC Card Standard, Release 7, http://www.pcmcia.org/bookstore.htm.


    B2.5.2.3 PCI Local Bus Specification, Revision 2.2 (PCI 2.2) or later

    [PCI-0123; SDG3:33]
    B2.5.2.4 PCI to PCI Bridge Specification, Revision 1.1

    [PCI-0124; SDG3:37]
    http://www.pcisig.com/developers/specification/
    B2.5.2.5 PCI-X Specification, Revision 1.0

    [SDG3:54]
    http://www.pcisig.com/data/news/1999/pci-x_v10.pdf
    B2.5.2.6 Mini PCI Specification, Revision 1.0

    http://www.pcisig.com/developers/specification/
    B2.5.2.7 PCI Hot-Plug Specification, Revision 1.0

    http://www.pcisig.com/developers/specification/


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    B2.5.2 PCI Controllers/Devices - Industry Standards

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