| A1.4.2.5.1 Devices must correctly implement the D3 state such that the operating system can enter into and resume from all sleep states supported on the system, including S3. Devices must be fully functional upon resume from the S3 state. Any PCI devices that support wakeup capabilities must correctly support wake from D3cold.
To ensure that a device meets these requirements, it must be tested in an S3-capable system. This is a requirement for the Windows Logo Program with the release of Windows XP.
The device categories affected by this requirement are: Audio, Modem, Network, Storage, USB/IEEE 1394, Video.
Driver requirements for power management are defined at B1.4.5. Individual device class and bus requirements for power management are defined in Appendix B.
A1.4.2.5.2 System power supply provides standby power for system wakeup events. At a minimum, the system must provide power for the core chipset, including memory and all integrated wake devices, for wakeup from the keyboard, a pointing device, and a single network device such as a LAN or wide area network (WAN) adapter connected via an external bus or open PCI slot when the system is in the ACPI S3 state. This requirement applies for S4 if the system supports wake from the ACPI S4 state.
IEEE 1394 host interface does not have to provide standby power for system wakeup events.
Mobile PC Note
This requirement for the system power supply does not apply to mobile PCs. See A1.4.2.4
A1.4.3 System contains required devices and buses A1.4.3.4 DELETED A1.4.3.5 One or more USB ports accessible by the user, with USB standard connector for all USB ports and devices
(see related requirements for each system type)
A1.4.3.6 DELETED A1.4.3.8 DELETED A1.4.3.9 DELETED A1.4.4 DELETED A1.4.5 DELETED A1.4.6 See B11.2 A1.4.7 DELETED See A1.4.3.7 A1.4.8 DELETED – See A4.4.11 (only applies to legacy-free systems) A1.4.9 DELETED A1.4.10 DELETED See B3.1.4.8.4 A1.4.11 DELETED – See A4.4.12 (only applies to legacy-free systems)
Implemented per Multiple APIC Description Table (ACPI 1.0b, Section 5.2.8).
For background information about APIC, see Key Benefits of the I/O APIC at http://www.microsoft.com/hwdev/platform/proc/IO-APIC.asp.
For technical information about how to implement this requirement, see the related chipset guide from your chipset vendor.
A1.4.12.1 All hardware interrupts are connected to an IOAPIC. A1.4.12.2 DELETED
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