B10.2.3 ATA/ATAPI Controllers/Devices - Quality

B10.2.4.1 DELETED

B10.2.4.2 DELETED

B10.2.4.3 DELETED

B10.2.4.4 ATA controllers and devices support Ultra DMA, do not claim 3F7h and 377h

All controllers and ATA hard drive peripherals must support Ultra DMA at transfer rates of 33 MB per second or higher as defined in ATA/ATAPI-5 (or later). In addition to improved transfer rates, Ultra DMA also provides error checking for improved robustness over previous ATA implementations. ATA controllers incorporated into PCI chip sets must implement DMA.

Definitions for the ACPI control methods can be found in Section 10.8 of ACPI 1.0b.

See A3.4.5.

B10.2.4.5 Dual ATA adapters use single FIFO with asynchronous access or dual FIFOs and channels; ATA disk drive supports

Although the use of an ATA adapter with more than one channel is optional, if included, dual ATA adapters must be designed so that either channel might be used at any time; the operating system does not have to serialize access between the primary and secondary channel. This requirement means either that the two channels are totally independent or that anything shared. For example, a programmed I/O (PIO) read prefetch buffer is protected by a hardware arbitrator.

Section 5.0 of the BIOS Boot Specification, Version 1.01 defines an implementation for dual asynchronous channels.

A design implementing a single first in/first out (FIFO) that uses a hardware solution to synchronize access to both channels meets this requirement. A request on one channel need not be completed before another request to the other channel can start. A software-based solution is not acceptable.

See A1.1.4.11.

ATA-based systems must be tested with ATA DMA enabled; the system must not have an embedded single-FIFO dual-channel ATA controller.