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B2.5.3 PCI Controllers/Devices - Quality
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bet | 121/250 | Sana | 21.03.2017 | Hajmi | 1,03 Mb. | | #428 |
B2.5.3 PCI Controllers/Devices - Quality
WHQL Test Specification References:
Chapter 4: PCI Test Specification
See B1.3.
Windows XP: Search for “PCI” to identify system-specific and device-specific topics in the HCT documentation.
B2.5.3.2 SEE B2.5.1.7 B2.5.4 PCI Controllers/Devices - Windows Experience
Design Guideline References:
PC 2001 System Design Guide, Chapter 6, "Buses and Interfaces"
Hardware Design Guide 3.0 for Windows 2000 Server, Chapter 2
B2.5.4.1 Power management supported as defined in PCI Bus Power Management Interface Specification, Rev. 1.1 (PCI-PM)
[PCI-0123; SDG3:28]
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System provides 3.3 V to all PCI connectors. [PCI-0123; SDG3:33)
System supports 3.3 Vaux if a system supports S3 or S4 states for integrated devices that support waking the system and all PCI slots including MiniPCI. [PCI-0131; SDG3:51; see FAQ B2.5.5.5 and B2.5.5.6]
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PCI add-on cards that use 3.3 Vaux operate correctly, using a method such as the one described in Section 7.4.4 of PCI-PM 1.1. [PCI-0130.2]
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Bus power states are correctly implemented. [PCI-0130; SDG3:50]
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Local area network (LAN) and modem devices support wake-up per PCI-PM 1.1. [PCI-0132; SDG3:89]
See FAQ B2.5.5.
See also "PCI Power Management and Device Drivers" at http://www.microsoft.com/hwdev/desinit/pcipm.htm.
B2.5.4.2 DELETED B2.5.4.3 Mini PCI devices support PCI 2.2, PCI-PM 1.1, and Mini PCI 1.0 specifications, and all other Logo requirements for PCI devices B2.5.4.4 Hot-Plug PCI supported via compatible driver solutions or ACPI
[SDG3:47]
"Compatibility Testing for Hot-Plugging Support for PCI Devices" at http://www.microsoft.com/hwdev/pci/hotplugpci.htm.
"Hot-Plug PCI and Windows Operating Systems" at http://www.microsoft.com/hwdev/pci/hotplugpci.htm.
B2.5.4.5 BIOS does not configure I/O systems to share PCI interrupts when APIC is activated
[BIOS-0016]
When an I/O APIC is enabled in the platform, the BIOS must configure the I/O systems such that non-PCI interrupts are not shared with PCI interrupts. At least four of the separate interrupt inputs in the I/O APIC must be dedicated to support PCI interrupts. The system layout and BIOS must minimize sharing of the PCI interrupts.
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