Examining architectures, programming

_[Lina J. Karam, Ismail AlKamal, Alan Gatherer,

Gene A. Frantz, David V. Anderson, and Brian L. Evans_]
Trends in Multicore DSP Platforms
_[Examining architectures, programming models, software tools, emerging applications, and challenges_]



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ulticore digital signal processors (DSPs) have gained significant importance in recent years due to the emergence of data-intensive applications, such as video and
high-speed Internet browsing on mobile devices that demand increased computational perfor- mance but lower cost and power consumption. Multicore platforms allow manufacturers to pro- duce smaller boards while simplifying board layout and routing, lowering power consumption and cost, and maintaining programmability.
Embedded processing has been dealing with mul- ticore on a board, or in a system, for over a decade.
Until recently, size limitations have kept the number of cores per chip to one, two, or four but, more recently, the shrink in feature size from new semiconductor processes has allowed single-chip DSPs to become multicore with reasonable on-chip memory and input/output (I/O), while still keeping the

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die within the size range required for good yield. Power and yield constraints as well as the need for large on-chip memory have further driven these multicore DSPs to become a system- on-chip (SoC). Beyond the power reduction, SoCs also lead to overall cost reduction because they simplify board design by minimizing the number of components required.
The move to multicore systems in the embedded space is as much about integration of components to reduce cost and power as it is about the development of very high-performance systems. While power limitations and the need for low-power


Digital Object Identifier 10.1109/MSP.2009.934113
devices may be obvious in mobile and hand-held devices, there are stringent constraints for nonbattery powered systems as well. Cooling in such systems is generally restricted to forced air only, and there is a strong desire to avoid the mechanical liability of a fan if possible. This puts multicore devices under a serious hot spot constraint. Although a fan-cooled rack of boards may be able to dissipate hundreds of watts (an ATCA carrier card can dissipate up to 200 W), the density of parts on the board will start to suffer when any individual chip power rises above roughly 10 W. Hence, the cheapest solution at the board level is to restrict the power dissipation to around 10 W per chip and then pack these chips densely on the board.

The introduction of multi- core DSP architectures pres- ents several challenges in hardware architectures, mem- ory organization and manage- ment, operating systems,