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6.4
HDL Description and system architecture for the analog
computing emulation concept of FPGA
Hardware description languages are similar to the normal programming languages. The
main difference between sequential programming and HDL programming is that in HDL
one describes the operations of digital circuits by code at either low level gates or at
behavioral level [111]. But in sequential programming we have a flow chart and an
algorithm that should sequentially run on a single execution CPU. In contrast to a software
programming language, HDL syntax and semantics include explicit notations for
expressing time and concurrency, which are the primary attributes of hardware. There are
many types of HDL descriptions that can cover from low level gates up to behavioral
modeling, such as Verilog, SystemC, VHDL, HandelC and so on. Verilog is the only language
that can cover the whole of this domain. It means that for description of system operations
there is the possibility to use a mix of gate level programming and behavioral
programming. Also, Verilog is easy to understand, and one can describe the functionality of
complex circuits by using this language.
To get good performance we have to execute operations such that as many operations as
possible are in parallel mode. This is due to the low clock rate in FPGA if compared to a
dedicated CPU. For implementing a system simulation or solving an ODE by a flow
diagram, we need some basic and fundamental arithmetic components, such as
summation, subtraction, multiplier, and integrator. For solving ODEs by analog computing,
there is no general solution, as each differential equation requires its own unique circuit or
bus connections. However, one could in theory create a series of reconfigurable matrix
switches that would be rewired for obtaining circuits and bus structures to different
arrangements depending on the problem (ODE) at hand. The implementation of these
functions on a digital platform (here FPGA) is easy, however with the exception of the
analog “Integrator”. For this, we use and adapt an old method called
Digital Differential
Analyzer
(DDA) for computing time integrals. In the next section, this technique is
presented.
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